Digital Fundamentals (3130704) - Question Bank
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Digital Fundamentals-3130704
GTU DF (Digital Fundamentals
-3130704) syllabus Contents:
Unit-1 Fundamentals of Digital systems and Logic families
Unit-2 Combinational Digital Circuits
Unit-3 Sequential Circuits and Systems
Unit-4 A/D & D/A Converters
Unit-5Semiconductor memories and Programmable logic devices
GTU DF (Digital Fundamentals -3130704) Study Material:
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Chapter 1 (Fundamentals of Digital Systems and logic families):-
1. Prove NAND and NOR gate as universal gates. – 7 marks
OR
Realize/Implement AND, OR, NOT, X-OR, X-NOR gates using NAND gates only.
Realize/Implement AND, OR, NOT, X-OR, X-NOR gates using NOR gates only.
2. State and prove De-Morgan’s theorems using truth-tables. – 4/7
3. List out various logic families. Also list characteristics of digital IC. Define various
characteristics. – 7
4. Give classification of logic families and compare CMOS and TTL. – 7
5. What is signal? Explain different types of signal. – 4
6. Examples related to
a. Realization of functions using AOI gates
b. Boolean Algebra/function simplification/minimization/reduction or proof
c. Number system conversion
d. 1’s & 2’s Complements & binary arithmetic
e. Various types of codes especially Hamming code
Chapter 2 (Combinational Digital Circuits) :-
1. Examples related to
a. Standard SOP/POS forms & their conversion into canonical SOP/POS (Minterm/Maxterm) forms
b. NAND & NOR realization
c. Simplification of logic/Boolean functions available in different forms
using ALL TYPES of K-MAPs including DON’T CARE CONDITIONS.
d. Combinational logic design using MUXs/DECODERs
i. Design a full adder and realize full adder using 3X8 Decoder and 2 OR gates. – 7
ii. Design full adder circuit using decoder and multiplexer. – 7
iii. Write a brief note on full subtractor with the help of its TT. Also design full subtractor logic circuit using 3 x 8 decoder and OR gates. Use X, Y, & Z as input variables and D & B as output variables. – 7
e. Code converter examples like
i. Design BCD to Excess 3 code converter using minimum number of NAND gates. – 7 OR 4-bit binary to Gray code converter. – 7 ORReverse conversion.
2. Explain Minterm & Maxterm. – 7
3. Draw & explain the logic diagram of a 4:1 multiplexer. – 4
4. With logic diagram and truth table, explain the working of 3-to-8 line decoder. –4
5. Explain 4 – bit binary parallel adder. – 4
6. Draw logic diagram of 1-digit BCD adder. – 4
7. Explain/Design 2-bit magnitude comparator. – 3/7
8. Draw & explain the block diagram of ALU. – 4
9. Write a brief note on BCD-to-7-segment decoder/driver. Set up a single 7-
segement LED display using 7447 BCD-to-7-segment decoder/driver.
Chapter 3 (Sequential circuits and systems) :-
1. Compare combinational logic circuit and sequential logic circuit. – 3
2. Draw & explain active-HIGH (or active-LOW) SR latch using truth-table. – 4
3. Draw & explain in detail the logic diagram & the truth table of clocked SR flip-
flop. – 4/7
4. How SR FF can be converted into JK FF? Draw & explain. – 4
5. What is the race around condition in JK flip-flop? Draw & explain the logic diagram of (master-slave) JK flip-flop. – 7
6. Construct D FF using SR/JK FF. Write truth table of D FF. – 3/4 marks
7. How JK FF can be converted into a T-type FF? Explain in brief using suitable diagrams and truth table. – 3/4 marks
8. List out and explain various applications of the flip-flops. – 7
9. Draw & explain in brief the logic diagram of 3/4/5-bit shift register. – 4
10. Explain the working of SISO shift register. – 4
11. Draw & explain in brief the logic diagram of 4-bit bidirectional shift register. – 4
12. Design 4-bit Ring counter using D flip-flop. OR Design a ring counter using five timing signals, – 4
13. List out and explain various applications of the (shift) registers. – 7
14. Draw & explain in brief the logic diagram of 3/4-bit ripple (asynchronous) up/down counter using T/JK FFs. – 4 marks
15. Draw basic internal structure of 7490 ripple counter IC. Construct BCD counter using 7490 IC.
16. Design a (synchronous) counter with the following binary sequence: 0, 1, 3, 7, 6, 4 and repeat. Use T – flip-flops. – 7
OR
Most Most Imp. - Design of 3-bit/4-bit synchronous up/down/decade counters using T/JK FFs. (Note: remember excitation table of all FFs.)
Chapter 4 (A/D and D/A Converters) :-
1. Draw & explain weighted-resistor D/A converter with necessary equations. – 7
2. Draw & explain R-2R ladder D/A converter with necessary equations. – 4/7
3. List out various specification/characteristics of a D/A converter. Discuss each one in
brief with suitable diagram. – 7
4. Write a brief note on quantization and encoding. – 4
5. List out various commonly used A/D converters. Draw & explain Flash A/D converter with necessary
decoding table. Also mention pros & cons of the same.
– 7
6. Draw & explain successive-approximation A/D converter with necessary equations. – 7
7. Draw & explain counting A/D converter with necessary equations. – 7
8. Draw & explain dual-slope A/D converter with necessary equations. – 7
Chapter 5 (Semiconductor memories and Programmable logic devices) :-
1. Draw internal organization of a 16 x 4 memory chip. – 4
2. Explain classification of Memories. – 3/7 marks
3. Explain the types of ROM. OR Short note on ROM. – 04/07 marks
4. Write a note on RAM (RWM). – 7
5. Differentiate between RAM & ROM. – 3
6. Compare SRAM with DRAM. – 3
7. Draw and explain block diagram of CPLD. – 4
8. Draw and explain basic architecture of FPGA. – 4
9. A combinational circuit is defined by the function F1 (A, B, C) = Σ m (4, 5, 7) & F2 (A, B, C) = Σ m (3, 5, 7). Implement the circuit with a PLA having 3 inputs, 3
product term & 2 outputs. – 07 marks OR
A combinational circuit is defined by
the functions: F1 (A, B, C) = Σ m (3, 5, 6, 7) & F2 (A, B, C) = Σ m (0, 2, 4, 7). Implement the circuit with a PLA having 3 inputs, 4 product term & 2 outputs. –07 marks
10. Implement following functions using ROM. F1 = Σm (1,3,4,6) and F2 = Σm (0,1,5,7).– 4
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